Designing a product requires more than just a great PCB layout tool – you need tightly integrated PCB design software. Expedition Enterprise provides this high level of integration, enabling all team members to work collaboratively and more efficiently.
Tightly Integrated Flow
It's Expedition™ Enterprises tightly integrated design environment, industry unique technologies and its ability to meet the needs of mid-sized to large electronics companies that really sets it apart from the competition. It features a common database and user interface, with rules that eliminate the burden of managing multiple tools to complete a design. Its electrical and manufacturing constraint management system, and design data and library management provides support
for local or globally dispersed design teams to leverage their resources and reduce design cycle times.
Data integrity is constantly maintained — from concept to manufacturing. Expedition Enterprise is integrated with DMS™ (Data Management System) and CES (Constraint Editing System), providing a central infrastructure for component libraries, design data versioning and management, design reuse, where used, entry and management of high speed and manufacturing rules, and integration with corporate PLM systems. Once the design is complete, integration with
manufacturing output tools ensures that the integrity of the design is maintained.
Industry-UniqueTechnologies
While tight integration provides a seamless environment to support the PCB systems design team,
Expedition Enterprise has extended beyond the classical definition of a PCB design solution and
con tains many industry-unique technologies. These technologies address the most advanced business needs of an electronics company enabling the development team to deliver a more competitive product to market faster and at reduced cost. These unique technologies fall into three categories: concurrent (parallel vs. serial) product development processes; use and analysis of the most advanced IC and PCB fabrication technologies; and, collaboration between the PCB designer and other disciplines in the product development process.
System Definition
Design Entry
DxDesigner provides a complete solution for design creation, definition and reuse. It provides everything needed for circuit design and simulation, component selection and library man -
agement, signal integrity planning, project management and team-based design.
With DxDesigner, multiple engineers can work on the same design concurrently without a classical split and re-join process. Changes made by one engineer are immediately reflected
in the master database being viewed by the team so interfaces between the schematic sheets are kept in sync. In addition to classical schematic symbols, DxDesigner supports spreadsheet input
of component and interconnect data. This is especially important to accommodate very-high-pin-count packages, where a schematic symbol would occupy several pages.
DxDesigner is also integrated with product lifecycle management systems, making design data, PDF schematics, and BOMs available throughout the company. It also has a centralized,
Internet-based library so only one version of the corporate library needs to be maintained.
Constraint Definition
Expedition Enterprise understands and follows an extensive set of high speed and manufacturing constraints (rules). These constraints are set either by engineer direct entry or by interfacing from pre-layout high speed analysis and are obeyed throughout the layout and verification steps to insure correct by design results.
The Constraint Editor System™ (CES) provides a fully integrated, constraint-driven design methodology that reduces design costs and time-tomarket by automating design rules
communication and eliminating unnecessary PCB prototypes and re-spins. And, like DxDesigner, multiple engineers can input and edit constraints concurrently without a divide and rejoin methodology that can be error prone and time consuming. Edits are viewed by the team as they are made, in real time.
CES provides common constraint entry for manufacturing and elec trical and physical high-speed
rules. CES has an easy-to-use spreadsheet-like GUI guided by the design database with cross probing to the schematic and layout.
• Rules are preserved on net renames, connectivity additions/removals, pin and/or gate swaps,
and stackup changes.
• The GUI offers easy differential pair creation, parallelism rules entry and pin-pair creation.
• Hierarchical constraint entry enables simple assignment of complex topologies with filtering
and sorting.
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